Optimization of a power mosfet and its monolithically integrated self-powering circuits

Abstract

The paper presents a physical structure optimization of an integrated semiconductor device: a power MOSFET and other vertical transistors are integrated within the same die, introducing a novel self supplied power transistor. This integrated optimal design leads to complex optimization problems with close constraints. The main constraint model deals with the avalanche phenomenon that is formulated by multiple integral expressions of implicit functions. The paper focuses on two aspects: the integral formulation of the avalanche model and more specifically its gradient computation in the aim of applying a gradient-based optimization algorithm, and the comparisons of several optimization methods on this problem.