Optimized memory requirements for wavelet-based scalable multimedia codecs

Abstract

Powerful multimedia applications are running more and more on very compact and resource-scarce, portable systems. As a consequence, system design optimization, its associated time-to-market constraints and the required automated tool support are becoming increasingly important issues, especially in situations where product derivatives and extensions introduce unforeseen and possibly dramatic constraints in the system optimization process. Nevertheless, the system designer remains an irreplaceable cornerstone for steering the whole system optimization process.

This paper presents the relationship of aforementioned aspects in the context of optimizing data access to memory, which is the dominant factor determining the system-on-a-chip area, data throughput and power consumption. The case study of a 1D and 2D forward and inverse wavelet transform, interacting with surrounding system modules imposed by current multimedia compression standards, leads the reader through the peculiar technical counter-measures and script-based optimization steps to be followed for reaching a satisfactory global optimization. In particular, the data dependencies between the different functional modules are shown to be crucial in the memory optimization process and lead to non-trivial/counter-intuitive decision takings that can increase the energy consumption gains compared to more commonly-accepted, though suboptimal approaches. An example is the counter-intuitive observation that though JPEG2000 uses independently entropy coded blocks over its wavelet subbands, it requires more memory because of “hidden” data dependencies, than its zero-tree based MPEG-4 counterpart, whose intricate entropy coding spreads over all the subbands. Hence, to achieve an overall optimal implementation with good trade-offs between efficiency and cost, it is strongly suggested that algorithmic and implementation designers should co-operate in early stages of the multimedia systems design, facilitated by high-level memory cost estimation analyses.