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Abstract

This study introduces an enhanced buck converter topology with integrated transient enhancement capability (TE-DSD) designed for high-ratio voltage conversion from 48 V input to precisely regulated 1 V output. The proposed architecture employs a multi-phase switched-inductance configuration that ensures current balancing across interleaved channels during steady-state operation through synchronized switching control and optimized magnetic coupling. A key feature is the advanced transient enhancement mode. This mode dynamically modifies switching node voltages through adaptive gate drive sequencing. It achieves precisely controlled elevation of inductive excitation voltages during load transients. This strategic voltage elevation mechanism substantially improves current slew rates while maintaining converter stability boundaries. Experimental validation under 10A load step conditions confirms the topology’s transient performance advantages, demonstrating quantifiable improvements of 39.4% in output voltage deviation suppression and 33.3% reduction in transient recovery duration when compared with conventional dual-phase switched-inductance (DSD) converter configurations. The topology maintains output voltage adjustability across the 1 V operational range while preserving current-sharing characteristics essential for thermal management in high-current applications.

Keywords

buck converter TE-DSD transient enhancement load response voltage conversion

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References

Ashourloo

Namburi

Pique

, et al. 17.2 A masterless fault-tolerant hybrid dickson converter with 95.3% peak efficiency 20 V-to-60 V input and 3.3 V output for 48 V multi-phase automotive applications. 2021 IEEE International Solid-State Circuits Conference (ISSCC), 2021, pp. 258–260.

Wei

Ramadass

. 11.1 A direct 12 V/24 V-to-1V 3W 91.2%-Efficiency tri-state DSD power converter with online VCF rebalancing and In-Situ precharge rate regulation. 2020 IEEE International Solid-State Circuits Conference (ISSCC), 2020, pp. 190–192.

Shenoy

Amaro

Freeman

, et al. Comparison of a 12 V, 10A, 3 MHz buck converter and a series capacitor buck converter. 2015 IEEE applied power electronics conference and exposition (APEC), 2015, pp. 461.

Shenoy

Amaro

Morroni

, et al. Comparison of a buck converter and a series capacitor buck converter for high-frequency, high-conversion-ratio voltage regulators. IEEE Trans Power Electron 2016; 31(10): 7006–7015.

Kirshenboim

Vekslender

Peretz

. Closed-loop design and transient-mode control for a series-capacitor buck converter. IEEE Trans Power Electron 2019; 34(2): 1823–1837.

Xue

Zhang

Lai

, et al. A high-efficiency double step down converter with dual-mode control and seamless mode transition in a wide load current range. 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 2023, pp. 1–5.

Huang

Lam

C -S

, et al. A symmetrical double step-down converter with extended voltage conversion ratio. IEEE Trans Circ Syst I 2022; 69(12): 4761–4773.

Shih

Y-T

. “A 24 V-to-1.8 V low input current ripple SC hybrid converter with conducted EMI noise suppression mechanism for automobile application”. 2024 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2024, pp. 1–3.

Shenoy

Lazaro

Amaro

, et al. Automatic current sharing mechanism in the series capacitor buck converter. 2015 IEEE Energy Conversion Congress and Exposition (ECCE), 2015, pp. 2003–2009.

10.

Yuan

Liu

, et al. A 12 V/24 V-to-1 V DSD power converter with 56 mV droop and 0.9 μs 1% settling time for a 3A/20ns load transient. 2022 IEEE International Solid-State Circuits Conference (ISSCC), 2022, pp. 1–3.

An improved 48 V-to-1 V buck converter featuring transient response enhancement

Abstract

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