Aiming at the low efficiency and accuracy of traditional methods in mask optimization of integrated circuits, a mask optimization algorithm based on deep learning is proposed. Firstly, an improved generation countermeasure network (GAN) model is designed. By introducing multi-scale feature fusion module and attention mechanism, the detail generation ability of mask pattern in lithography proximity effect correction is improved. Secondly, a dynamic weight adjustment strategy is proposed to adaptively balance the optimal weights in different regions during the training process. In the aspect of FPGA acceleration, a customized hardware architecture is designed for the computing bottleneck of the optimization algorithm. The experimental results show that, compared with the traditional OPC algorithm, this method significantly shortens the optimization time, improves the speedup ratio on the FPGA platform, and maintains a low edge placement error (EPE).
TeeY-YChengDShiY, et al.Integrated circuit mask–generative adversarial network for circuit annotation with targeted data augmentation. IEEE Intell Syst2023; 39: 37–45.
2.
GuAZakhorA. Optical proximity correction with linear regression. IEEE Trans Semicond Manuf2008; 21: 263–271.
3.
NgoATDeyBHalderS, et al.Machine learning-based edge placement error analysis and optimization: a systematic review. IEEE Trans Semicond Manuf2022; 36: 1–13.
4.
XiaWZhangYYangY, et al.Gan inversion: a survey. IEEE Trans Pattern Anal Mach Intell2022; 45: 3121–3138.
5.
ZhengHLinZLuJ, et al.Semantic layout manipulation with high-resolution sparse attention. IEEE Trans Pattern Anal Mach Intell2022; 45: 3768–3782.
6.
PeaseRFChouSY. Lithography and other patterning techniques for future electronics. Proc IEEE2008; 96: 248–270.
7.
DongXZhangL. Analog layout retargeting with process-variation-aware hybrid OPC. IEEE Trans VLSI Syst2017; 26: 594–598.
8.
LiangXOuyangYYangH, et al.Rl-opc: mask optimization with deep reinforcement learning. IEEE Trans Comput Aided Des Integrated Circ Syst2023; 43: 340–351.
9.
ChenLChenYChuZ, et al.Large circuit models: opportunities and challenges. Sci China Inf Sci2024; 67: 200402.
10.
DouBZhuZMerkurjevE, et al.Machine learning methods for small data challenges in molecular science. Chem Rev2023; 123: 8736–8780.
11.
GhiasiGLinT-YLeQV. Dropblock: a regularization method for convolutional networks. Adv Neural Inf Process Syst2018; 31: 153–177.
12.
WangYWangWLiY, et al.An attention mechanism module with spatial perception and channel information interaction. Complex Intell Systems2024; 10: 5427–5444.
AbdelouahabKPelcatMSerotJ, et al.Tactics to directly map CNN graphs on embedded FPGAs. IEEE Embed Syst Lett2017; 9: 113–116.
15.
ChenLLiSBaiQ, et al.Review of image classification algorithms based on convolutional neural networks. Remote Sens2021; 13: 4712.
16.
ShinY. Computational lithography using machine learning models. IPSJ Transac System LSI Design Meth2021; 14: 2–10.
17.
ShiHXuYWangY, et al.NASA-F: FPGA-oriented search and acceleration for multiplication-reduced hybrid networks. IEEE Trans Circ Syst I2023; 71: 306–319.
18.
MaXWangZLiY, et al.Fast optical proximity correction method based on nonlinear compressive sensing. Opt Express2018; 26: 14479–14498.
19.
KimTZhangSShinY. Model-based OPC with adaptive PID control through reinforcement learning. IEEE Trans Semicond Manuf2025; 20: 1233–1253.
20.
DongXZhangL. PV-aware analog sizing for robust analog layout retargeting with optical proximity correction. ACM Trans Des Autom Electron Syst2018; 23: 1–19.
MaYSudaNCaoY, et al.ALAMO: FPGA acceleration of deep learning algorithms with a modularized RTL compiler. Integration2018; 62: 14–23.
23.
RoshanMGGholamiM. Novel level and edge-triggered universal shift registers with low latency in QCA technology. Heliyon2024; 10: 110–132.
24.
De BisschopP. How to make lithography patterns print: the role of OPC and pattern layout. Adv Opt Technol2015; 4: 253–284.
25.
ChaiZZhaoYLiuW, et al.Circuitnet: an open-source dataset for machine learning in vlsi cad applications with improved domain-specific evaluation metric and learning strategies. IEEE Trans Comput Aided Des Integrated Circ Syst2023; 42: 5034–5047.
26.
GiacominEGaillardonP-E. A resistive random access memory addon for the ncsu freepdk 45 nm. IEEE Trans Nanotechnol2018; 18: 68–72.
27.
HuangGHuJHeY, et al.Machine learning for electronic design automation: a survey. ACM Trans Des Autom Electron Syst2021; 26: 1–46.
28.
ZhuBZhengSMaY, et al.Bridging hotspot detection and mask optimization via domain-crossing masked layout modeling. ACM Trans Des Autom Electron Syst2025; 14: 55–78.
