IESP Exascale Challenge: Co-Design of Architectures and Algorithms

Abstract

There is a large gap between the peak performance of supercomputers and the actual performance realized by today’s algorithms. This architecture—algorithm performance gap will get even wider with the increase in computing power being driven by a rapid escalation in the number of cores incorporated into a single chip rather than increases in the clock rate. In order to improve the effectiveness of peta and exascale systems we need to have a paradigm shift where architectures and algorithms are co-designed.