An ASIC Design for Versatile Receive Front-End Electronics of an Ultrasonic Medical Imaging System — 16 Channel Analog Inputs and 4 Dynamically Focused Beam Outputs

Abstract

An ultra large-scale ASIC is designed for the receive front-end electronics of an ultrasonic medical imaging system. The chip receives 16 channel analog rf signals and outputs 4 sets of sample-point-wise dynamically focused partial beam data. Four complete beam data sets are obtained in parallel by simply cascading as many chips as needed in an array system. High resolution of the focusing delay is obtained by nonuniformly selecting each channel data from a quadruply-interpolated rf data stream. The proposed ASIC can be applied to most practical array transducers in the frequency range of 2 to 10 MHz. The digital part of the designed ASIC can be implemented on a chip area of 17.9 μm² with 0.18 mm CMOS technology, leaving sufficient room for 16 ADCs of 8 bits, 50 MHz on the 5.7 mm × 5.7 mm chip with a 208 pin package.

Keywords

Apodization FIFO-adder structure front-end VLSI of ultrasonic imaging systems multiple beams quadratic interpolation sample selection clock

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