Distributed Simulation of Parallel DSP Architectures on Workstation Clusters

Abstract

The limits of sequential processing continue to be overcome with parallel and distributed architectures and algorithms. In particular, the use of parallel processing for high-performance signal processing and other grand-challenge applications is becoming the norm. However, the costs associated with such systems make it critical to be able to forecast system behavior before a hardware prototype is constructed. Processor libraries and other functional modeling and simulation techniques allow the complexities of actual systems to be portrayed in the form of software-based prototypes with significantly more accuracy than traditional simulation methods. Although the simulation times often grow beyond practical limits, distributed simulation methods have the potential to reduce these times in a scalable fashion. One such method is to implement processor library models with a parallel programming language on perhaps the most flexible, available, cost-effective, and practical of all parallel computing platforms, the workstation cluster. This technique can in many cases achieve near- linear simulation speedup using existing computer resources.