Computer-Aided Design (CAD) is gaining importance in Very Large Scale Integration (VLSI) design for three reasons: CAD reduces design time, minimizes cost, and controls complexity.
This paper describes a CAD program, SPICEGEN, developed to extract a node list from a physical layout, allowing SPICE simula tion runs directly from a physical layout. SPICEGEN has been demonstrated to save Honeywell Large Computer Products Divi sion (LCPD) time at a reduced cost by identifying errors before the prototype IC's were manufactured. Furthermore, when SPICEGEN approved a layout, it was indeed correct and could be manufactured with yield the first time.
SPICEGEN can be used alone or in conjunction with other available CAD tools. Although originally developed to run SPICE simulations, SPICEGEN has, as a bonus, an error report file. This file uncovers errors such as open circuits without running the SPICE simulation.
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