Abstract
This paper discusses the multiple-instruction stream/ multiple-data stream (MIMD) Wisconsin parallel array computer (WISPAC). The design of the computer makes use of current, low-cost microprocessor technology and is intended to meet future needs in large-scale simulation. A modular approach is taken where smaller configurations are meant as direct competi tive replacements of current hybrid systems. Larger configurations will allow high-speed solution of large-scale simulation problems using a one-to-one correspondence of each microprocessor to each node of the system being modeled. A three-dimensional configuration is used to allow a high degree of iso morphism between the computer setup and the model to be investigated. These schemes simplify programming requirements and overall machine conceptualization. New techniques of high-speed internode communication utilizing a serial "pass-through" scheme are des cribed. The scheme allows general cross-array com munication that is competitive with cross-point methods. Initial work on a minimal parallel config uration is also described.
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