Abstract
This report describes the design and performance of a fast wideband quarter-square diode multiplier de signed to work with the ±10-v low-impedance com puting circuits of a high-speed iterative differential analyzer (ASTRAC II), or in other hybrid analog- digital computer systems. To reduce cost, the new multiplier employs absolute-value squaring circuits and does not require committed computer ampli fiers. Improved combination shunt-series switching circuits and low resistance values ensure wide band width (±0.5% of half-scale dynamic error at 10 Kc, <1 degree phase shift below 70 Kc). Temperature- compensating diodes in the bias networks reduce thermal drift below 0.7 mv/°C, so that the multiplier static accuracy of ±0.20% of half-scale is maintained from 15 to 40° C. A number of useful design hints are listed.
Get full access to this article
View all access options for this article.