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Abstract

Advanced 300-mm ASIC/SOC (application-specific integrated circuit/system on a chip) fabrication plants with multiproduct and multiprocess models will require both a high level of flexibility and efficiency to achieve cost-effective manufacturing cycle times. Today, potential solutions to achieve breakthrough manufacturing cycle times are under consideration. Given the dynamic nature of all of the manufacturing phenomena involved in chip fabrication, the increasing manufacturing complexity level, and the huge investment required, the industry has turned to dynamic simulation as the standard tool to use when attempting to provide an accurate analysis of the impact of each strategic or tactical decision being made in the fabrication plant. A design of experiments based on dynamic simulation, using real production equipment performances as input, is the basis of these experiments. This model allows testing of various manufacturing scenarios and measuring their impact on manufacturing cycle time.

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References

1 VLSI Research Inc. 1999. Chip Insider, 21 December.

2 Claasen-Vujcic, T., R. Noben, R. Van Driel, and T. Claasen-Vujcic. 2001. Analysis of a 200/300 mm vertical furnace with integrated metrology . Solid State Technology 44 (4): 6-12 .

3 Thompson, M. 1998. Flexible fabs: Some consideration . Paper presented at the International Trade Partners Conference, November.

4 Mercier, D., and O. Bonnin. 2002. 300 mm semiconductor manufacturing cycle time strategy assessment through a DOE based on dynamic simulation . In Proceedings of the International Conference on Modeling and Analysis of Semiconductor Manufacturing (MASM), April, Tempe, AZ, pp. 122-125 .

5 Bensahel, D., B. Vandelle, C. Morin, J. Martins, J. Galvier, P. Vialletelle, and M. Henry. 2000. Front-end, single wafer diffusion processing for advanced 300 mm fabrication lines. MRS Strasbourg, May 2000 . Microelectronic Engineering 56: 49-59 .

6 Hubac, S. 2002. APC implementation at equipment level in a 300 mm dry etching pilot line . Paper presented at the APC/AEC conference, April, Dresden, Germany.

7 Schömig, A., and J. W. Fowler. 2000. Modeling of semiconductor manufacturing operations . In Proceedings of the 9th ASIM Dedicated Conference Simulation in Production and Logistics, edited by K. Mertins and M. Rabe, 55-64 .

8 Kumar, P. R. 1993. Re-entrant lines . Queueing Systems Theory and Applications 13 (1-3): 87-110 .

9 Shikalgar, S., D. Fronckowiak, and E. A. MacNair. 2002. 300 mm wafer fabrication line simulation model . In Proceedings of the 2002 Winter Simulation Conference, San Diego, CA.

10.

10 Qi, C., T. K. Tang, and A. I. Sivakumar. 2002. Simulation based cause and effect analysis of cycle time and WIP in semiconductor wafer fabrication . In Proceedings of the 2002 Winter Simulation Conference, San Diego, CA.

11.

11 Robinson, J. 2001. Impact of batch size decision rules on cycle time. FabTime Cycle Time Management Newsletter, 17 January.

12.

12 Obrien, M. 1999. Improving manufacturing simulations by modeling technician decision processes . AutoSimulations Symposium ’99, Salt Lake City, UT.

13.

13 Steiger, N. M., and J. R. Wilson. 2000. Experimental performance evaluation of batch means procedures for simulation output analysis . In Proceedings of the 2000 Winter Simulation Conference, edited by J. Joines, R. R. Barton, K. Kang, and P. A. Fishwick, vol. 1, 627-636 .

14.

14 Montgomery, D. C. 1997. Design and analysis of experiments. 4th ed. New York: John Wiley .

15.

15 Hopp, W. J., and M. L. Spearman. 2000. Factory physics. New York: McGraw-Hill .

Achieving Optimal Cycle Time Improvement in a 300-mm Semiconductor Fab Using Dynamic Simulation and Design of Experiments

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