As circuits become larger and more complicated, logic simulation plays an important role in design verification and is widely used. However, unknown values in three-value simulation may cause the unknown value propagation problem that produces indeterminate output values. In this article, a new simulation algorithm is developed that can efficiently overcome the unknown value propagation problem. The algorithm is based on the partitioning approach. The experimental results using benchmark circuits prove the effectiveness of the new simulation algorithm.
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References
1.
1 Olukotun, K., M. Hemrich, and D. Ofelt. 1998. Digital system simulation: Methodologies and examples . Proceedings of Design Automation Conference, pp. 658-662 .
2.
2 Kang, S., and S. Szygenda. 1991. The Simulation Automation System (SAS): Concepts, implementations and results . IEEE Transaction on VLSI2 (1): 89-99 .
3.
3 Miczo, A. 1986. Digital logic testing and simulation. New York: Harper & Row .
4.
4 Horbst, E. 1986. Logic design and simulation. Amsterdam: North- Holland .
5.
5 Jea, Y. H., and S. A. Szygenda. 1979. Mapping and algorithms for gate modeling on a digital simulation environment . IEEE Transactions on Circuits and Systems26 (5): 304-315 .
6.
6 Szygenda, S., and F. W. Thomson. 1976. Modeling and digital simulation for design verification and diagnosis . IEEE Transactions on Computers325 (12): 1242-1253 .
7.
7 Breuer, M. A., and A. D. Friedman. 1976. Diagnosis and reliable design of digital systems. Woodland Hills, CA: Computer Science Press .
8.
8 Abramovici, M., M. A. Breuer, and A. D. Friedman. 1990. Digital system and testable design. New York: IEEE Press .
9.
9 Chandra, S. J., and J. H. Patel. 1987. Accurate logic simulation in the presence of unknowns . Proceedings of International Conference on Computer-Aided Design, pp. 34-37 .
10.
10 Chang, H. P., and J. A. Abraham. 1987. The complexity of accurate logic simulation . Proceedings of International Conference on Computer-Aided Design, pp. 404-407 .
11.
11 Schulz, M., Trischler, E., and Sarfert, T. 1987. SOCRATES: A highly efficient automatic test pattern generation system . Proceedings of International Test Conference, pp. 1016-1026 .
12.
12 Silva, J., and A. Sakallah. 1996. Dynamic search space pruning techniques in path sensitization . Proceedings of Design Automation Conference, pp. 705-711 .
13.
13 Pomeranz, I., and S. Reddy. 1996. Fault location based on circuit partitioning . Proceedings of International Conference on Computer- Aided Design, pp. 242-247 .
14.
14 Brglez, F., and H. Fujiwara. 1985. A neutral netlist of 10 combinational benchmark circuit and a target translation in FORTRAN . Proceedings of the International Symposium on Circuit and Systems, pp. 695-698 .
