Modeling and Simulative Performance Analysis of SMP and Clustered Computer Architectures

Abstract

The performance cliaracteris tics of several classes of parallel computing systems are analyzed and com pared using high-fidelity modeling and execution- driven simulation. Processor, bus and network mod els are used to construct and simulate the architec tures of symmetric multiprocessors (SMPs), clusters of uniprocessors, and clusters of SMPs. To demon strate a typical use, the performance of ten systems is evaluated using a parallel matrix-multiplication algorithm. Because the performance of a parallel algo rithm on an architecture depends on its communica tion-to-computation ratio, an analysis of communica tion latencies for bus transactions, cache coherence, and network transactions is used to quantify each system's communication overhead. While low-level performance attributes are difficult to measure on experimental testbed systems, and are difficult to accurately represent in purely analytical models, with high fidelity simulative models they can be readily and accurately obtained. This level of detail allows the designer to rapidly prototype and evaluate the performance of parallel and distributed systems.