The experiment is designed round an Intersil 7106 evaluation kit. It illustrates that the correct reading relies on the reference voltage being correct, but that it is not affected by the clock oscillator frequency, or the integrator time constant. The effect of fluctuations in the input voltage can be demonstrated to show the averaging effect of the integration period.
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References
1.
Data sheet for 3½ Digit Single Chip A/D Converter ICL7106, 7107, Intersil Inc.
2.
FullagarD. and DufortM.Low Cost Digital Panel Meter Designs, Application Bulletin A023, Intersil Inc., Cupertino California, USA.
