Fast-turnaround gate array commitment using e-beam generated masks
Gate arrays have been shown to provide an excellent means of introducing students to the design of circuits on silicon. Using electron beam lithography to produce the single mask required for patterning the metal interconnection layer, a number of different designs can be fabricated on a multi-chip wafer. The paper describes how this technique has been applied to the Ferranti 5C000 Uncommitted Logic Array (U.L.A.).
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