Low risk multi-project semi-custom microelectronics for undergraduate teaching purposes
This paper discusses the need for integrated-circuit fabrication resources to support design activities at undergraduate level, and continues with a discussion of a particular form of masterslice array, which has been fabricated in CMOS technology. It is suggested that this form of circuit provides a viable means for multiproject undergraduate circuits.
Get full access to this article
View all access options for this article.
References
1.
TwaddellW.., ‘Uncommitted IC logic’, EDN, 25, No. 7, pp. 89–98 (1980)
PenistonG. E.., ‘A survey of the present and future status of the semicustom arena’, J. of Semicustom ICs, 1, No. 2, pp. 5–12 (1983)
5.
HurstS. L.., ‘A CMOS breadboard gate array for educational and R&D purposes’, Int. J. Elec. Eng. Education, 19, pp. 213–227 (1982)
6.
JenningsP. I.., ‘A topology for semi-custom array-structured LSI devices and their automatic customisation’, Proc. IEEE Design Automation Conf., Miami pp. 675–681 (June 1983)
7.
JenningsP. I., McDonaldA., and HurstS. L.., ‘An exercise into a highly routable masterslice gate array topology’, J. of Semicustom ICs, 1, No. 3, pp. 17–30 (1984)