Straightforward predictive direct power control for grid-connected ANPC inverter with flying capacitor voltage self-balancing

Abstract

Improving control quality in inverter systems has attracted considerable attention, particularly in multilevel inverters for high-power applications. This study suggests a straightforward predictive direct power control system for a five-level Active Neutral Point Clamped inverter connected to the grid. The proposed method offers the benefit of reducing the heavy computational load by implementing a two-stage optimization process for the objective function. In contrast to the conventional finite control set model predictive control which involves comprehensive searches for all possible switching configurations within the iterative optimization process, the suggested approach focuses only on potential voltage vectors based on the desired inverter voltage’s location at the initial stage. Second, the self-balancing flying capacitor voltages are guaranteed by employing the duplicative switching states. Another advantage of the presented algorithm is an obviation of numerous selecting weighting factors. The effectiveness of the advanced strategy is confirmed through extensive comparative simulation and hardware-in-the-loop studies conducted in both conditions during stable states and transitions. Contrasted to the previous technique, this innovative method demonstrates an improvement in the grid’s power ripple and total harmonic distortion of the current by 14.66% and 19.58%. Furthermore, the computational time required for this method is significantly reduced by 64.58%, and 61.36% correlate to the traditional and other approaches, respectively. These results may facilitate the implementation of an effective control approach for multilevel inverters, employing a cost-effective control platform by a limited sampling interval.

Introduction

Multilevel inverters (MLIs) have become a subject of considerable fascination in high-power medium-voltage applications because of their ability to minimize voltage stresses, maintain base $\mathrm{dv}/\mathrm{dt}$ , and ensure superior power standards.^1–3 The growing need for higher voltage levels and enhanced performance has posed challenges for the three traditional multilevel structures: neutral point clamped (NPC), flying capacitor (FC), and cascaded H-bridge. These difficulties include a large quantity of diodes, FC, or separated DC inputs, leading to intricate control issues. By merging the strength of the NPC and the adaptability of FC inverters, the five-level Active Neutral Point Clamped (ANPC) inverters exhibit benefits such as fewer switches, a diminished quantity of capacitors, and a simple method of balancing voltage, making them a promising alternative in this field.^4,5 It has gained widespread acceptance in various industries, exemplified by its utilization in applications like ACS2000 for medium voltage drive and photovoltaics system.^4,6,7

Traditional control techniques are commonly employed in power electronic applications, but they have drawbacks related to handling nonlinearities and constraints, parameter tuning, and low transient response. ⁸ Addressing multi-objective issues using traditional techniques like linear control techniques with modulation methods involving pulse widths or spatial vectors is considered difficult. For instance, in APNC inverters, the task involves not only regulating the output current but also concurrently accomplishing a balance of FC voltages and DC-link capacitor voltages (Figure 2).^9–11 Several improved control methods have lately been implemented for multilevel inverters. Among these approaches, model predictive control (MPC) stands out as a promising strategy. There are two types of MPC: continuous control set MPC (CCS-MPC) and finite control set MPC (FCS-MPC). The CCS-MPC involves calculating the desired vector and using a modulation technique to produce switching signals. However, its notable drawback lies in the high computational burden, particularly when constraints and nonlinearities must be considered. On the contrary, FCS-MPC leverages the finite compact set of the inverter’s switch status to specify the best one by minimizing the objective function. The FCS-MPC offers particular advantages, including rapid dynamic response, simplicity, and the capacity to manage numerous control goals and restrictions.^12,13 In terms of real-time computations, one of the key obstacle faced by FCS-MPC is the significant computational burden for MLIs due to the comprehensive exploration of all the combinations of switching control gates in an online computational phase, particularly for MLIs at higher levels. This leads to extended execution times, necessitating prolonged control cycles and negatively impacting control performance. The employment of a digital processor with fast computational capabilities is one possibility, but it comes at the cost of increased system prices. The decrease in computational cost of the FCS-MPC has garnered significant interest and continues to be the subject of ongoing investigation.

Unlike two-level inverters, the 5L-ANPC inverter requires the assessment of 512 voltage vectors at every sampling interval, resulting in a heightened computational challenge. Zhang et al. ¹⁴ and Zhou et al. ¹⁵ introduce a new methodology for the implementation of three-level NPC inverters. The initial step involved the computation of the voltage vector reference, which was then directly compared with the existing voltage vectors to assess the objective function. These approaches led to a considerable decrease in the iteration period required for predicting control objectives associated with voltage vectors, as well as a lowered computational load. Nevertheless, applying these methods to high-level MLIs, particularly those with a significant quantity of duplicative switching status, poses challenges. The evaluation of numerous redundant switching states necessitates extensive calculations, making the application of these methods less straightforward in such cases. A recent MPC technique was introduced in Sun et al. ¹⁶ to decrease the number of computations needed for three-level ANPC-fed PMSM. This method involves the calculation of the predictive voltage sign which is incorporated with the switching conditions of a half-bridge module to create a novel set of viable voltage vectors through a hysteresis technique. Nevertheless, this approach doesn’t consider the balance of the FC voltage which is required for the 5L-ANPC inverters. MPC methods implicating numerous vectors^17,18 utilize two or three active voltage vectors in each sampling time instead of just one. While these techniques were initially designed for two-level inverters, they cannot be directly adapted for multilevel inverters. MLIs present challenges for direct application primarily thanks to their substantial number of redundant switching states. The selection process for two or three voltage vectors from this pool causes complex calculations. Applying the FCS-MPC with model approximation ¹⁹ in the context of the 5L-ANPC reduces the assessed converter states from 512 to 24. However, this reduction in computation results in a decrease in control performance compared with the classic FCS-MPC, leading to inferior tracking accuracy and increased voltage ripples in the FC and DC-bus. The underlying cause of this degradation is the omission of redundancies inherent in the three-phase converter by the system model approximation. An alternative technique ²⁰ is recommended for the one-phase split-capacitor ANPC inverter to circumvent the requirement of forecasting the mid-point voltage of the DC-bus in the objective function. This is achieved by incorporating the balance of the DC-bus directly into the control goal of FC. This approach fails to incorporate the power control of the grid-connected inverter. ²¹ introduced a method to restrict the level jumps of inverter voltage, which reduces the number of switching states and shortens computation time. However, this strategy may adversely affect control performance by omitting several switching states. Within the framework of Yang et al.^22,23 and Liu et al., ¹¹ a MPC strategy is presented for a 5L-ANPC converter, utilizing a constant switching frequency and employing two or three vectors during each control duration. The initial phase identifies the timing for applying vectors through the analysis of the objective function, whereas the second phase incorporates the concept of the current gradient. However, these approaches require calculating duration times for optimal sequences, resulting in the heightened intricacy of the control strategy. ²⁴ improved a control methodology by incorporating sector distribution into the FCS-MPC for four-level nested NPC inverters. Nonetheless, the approach remains somewhat cumbersome due to the differing effects of the redundant switching vector on the balance of FC voltages, which limits the practicality of implementing the algorithm with a brief sampling interval. Wu and Wang ²⁵ presented a new approach for controlling the current of four-level T-type NPC inverters with $\mathrm{RL}$ load. This method can achieve the FC voltage balancing and possible computational burden. The interaction loop for the optimization cost function is reduced from 126 to 64. There are limitations to applying 5L-ANPC inverters due to the presence of neutral point voltage of DC-bus and many space vectors of inverter voltage.

Effectively managing various objectives stands out as a primary advantage of FCS-MPC. Nonetheless, the process of coordinating multiple weighting coefficients to attain satisfactory performance across all objectives is complex and burdensome. Incorporating topology-related objectives is vital for ensuring the proper operation of MLIs, which largely depends on the inverter’s configuration. An illustrative example is the necessity for balancing the FC voltage and the neutral point voltage of the DC bus, a critical purpose for 5L-ANPC inverters. The recommendations outlined by Harbi et al. ¹³ focus on the empirical determination of suitable weighting factors, employing a heuristic algorithm in the process. Alternative approaches involve optimizing a cost function with an artificial neural network, ²⁶ utilizing a normalized weighted sum model, ²⁷ employing an auto-tuning procedure for dynamically choosing weighting elements in real time based on fuzzy logic, ²⁸ and implementing multiobjective optimization using decision-making multiple criteria. ²⁹ However, these approaches elevate the computational load and add complexity to the control process of FCS-MPC. Several methods are suggested to eliminate the impact of coefficient factors on the cost function. A hybrid MPC is presented in Dehong et al. ³⁰ for 5L-ANPC converters. This method ensures control objectives by separating the low-frequency and high-frequency components of the converters. However, it necessitates determining the optimal duty cycle for tracking current and modulating control switching signals. In Xiao et al., ³¹ a novel cascaded MPC is introduced for induction motor drives that are powered by a 3L-ANPC inverter. This framework sequentially assesses the flux vector and neutral point voltage. While it is feasible to eliminate the weighting factors, this technique demands a higher level of calculation to identify the optimal solution.

Inspired by the issues outlined earlier and the prior efforts to handle the limitations of traditional FCS-MPC and the previous techniques, our study introduces a straightforward predictive direct power control scheme for a grid-connected 5L-ANPC inverter with flying capacitor voltage self-balancing. A predictive model is employed to estimate the grid current and the neutral point voltage of the DC bus. The control variables are derived from the anticipated state variables of the system alongside the observed measurements. Control objectives, such as the regulating of grid power, the equilibrium of FC voltages, and the stabilization of neutral point voltage, are realized through the established cost function via three stages. In the first stage, the suggested approach identifies the desired inverter voltage’s location based on the predictive powers, their reference, and grid voltage. The viable voltage vectors of 5L-ANPC inverters for the optimization loop are reduced from 125 to 35 during the second stage. At the final stage, the inverter achieves its optimal switching state by combining the most effective inverter voltage from the minimization loop with the appropriate redundant switching states for FC voltage balancing. The primary advancements highlighted in this article include:

• The offered strategy notably decreases the computational load by about 91% compared to the traditional FCS-MPC. ¹³ This reduction is achieved through the elimination of the computational load needed for predicting FC voltage and, additionally, by decreasing the number of predictions for grid current and neutral-point voltage, along with the evaluations of the cost function. Contrasted to the previous method, ²⁵ the mean computation time of the proposed approach is reduced by 56.4% from 39 $\mu \mathrm{s}$ to 17  $\mu \mathrm{s}$ , while it diminished 61.36% compared to the alternative technique. ²⁴ These findings may enhance the implementation of a practical control scheme for MLIs, utilizing an economical control platform with a minimized sampling interval.

• The proposed technique balances the FC voltages by utilizing a straightforward logic state to choose the appropriate combination control gate among the redundant switching vectors. Three control goals of the system only use one weighting element, simplifying control intricacy by eradicating the burdensome task of coordinating multiple weighting factors.

• The offered approach performs as well as traditional FCS-MPC in both dynamic and steady-state operations, including time taken for stabilization, power fluctuations, and total harmonic distortion (THD) of the current, while extremely decreasing computational cost. The algorithm put forth an improvement in steady-state performance compared to the other methods,^24,25 primarily due to its successful mitigation of the issues related to the selection of multiple optimal weighting factors. The mean absolute percentage error of power ripples is diminished by 3.41% and 14.66% compared to the previous method ²⁵ and prior technique, ²⁴ respectively. The proposed strategy resulted in a THD of 1.15% in the grid current, contrasting with the 1.28% found in the technique mentioned in Wu and Wang ²⁵ and the 1.43% recorded for an alternative approach. ²⁴

The format of this paper is as follows: Section “Description and modelling of the grid-tie five level ANPC inverter” outlines the 5L-ANPC configuration and the mathematical model. The details of the suggested straightforward FCS-MPC strategy are provided in Section “Direct power control with simplified self-balancing of the flying capacitor voltage approach based on the FCS-MPC scheme.” Section “Simulation and processor-in-loop results” includes simulation verification, comparison analysis, and results discussion. In conclusion, Section “Conclusions” summarizes the paper.

Description and modelling of the grid-tie five level ANPC inverter

The reduced configuration of the grid-tie five-level ANPC inverter is illustrated as Figure 1.^10,23 Every stage of the inverter is made up of eight power switches and one FC. The switches for each phase work in a way that complements each other, such as ( $S_{x1}$ , $S_{x1}\prime$ ), ( $S_{x2}$ , $S_{x2}\prime$ ), ( $S_{x3}$ , $S_{x3}\prime$ ), and ( $S_{x4}$ , $S_{x4}\prime$ ) with $x\in \{a,b,c\}$ . The DC-bus capacitor voltages are controlled at $V_{\mathrm{dc}}/2$ with a constant input voltage. Preserving the flying capacitor voltage at $V_{\mathrm{dc}}/4$ results in five steps of inverter phase voltage: $-V_{\mathrm{dc}}/2$ , $-V_{\mathrm{dc}}/4$ , $0$ , $V_{\mathrm{dc}}/4$ , and $V_{\mathrm{dc}}/2$ , that coordinate eight switching combination vectors from $V_0$ to $V_7$ . As a result, the 5L-ANPC inverter supports $8^3=512$ different switching state possibilities. Redudant switching vectors are divided into three sets: ( $V_1$ , $V_2$ ), ( $V_3$ , $V_4$ ), and ( $V_5$ , $V_6$ ). The combinations of switches for inverter voltage vectors $V_1$ , $V_2$ , and $V_5$ , $V_6$ influence the FC voltage, while the four switching statuses $V_1$ , $V_2$ , $V_3$ , and $V_4$ affect the equilibrium of the neutral-point voltage of DC-bus. Table 1 provides an overview of the switching status concerning the phase voltage and the impact on the FC voltage and neutral point voltage for 5L-ANPC inverters.^11,23

Figure 1.

Structure of the grid-connected 5L-ANPC inverters.

Figure 2.

Voltage vector sector distribution provided by the 5L-ANPC inverter.

Table 1.

Switching status of each branch of the 5L-ANPC inverters.

Switching vector	Switching status of each phase				Output level	Phase voltage	Neutral point current	FC current
$V_x$	$S_{x1}$	$S_{x2}$	$S_{x3}$	$S_{x4}$	$L_x$	$u_{\mathrm{xo}}$	$i_{\mathrm{NPx}}$	$i_{\mathrm{fx}}$
$V_0$	0	0	0	0	−2	$-V_{\mathrm{dc}}/2$	0	0
$V_1$	0	0	0	1	−1	$-V_{\mathrm{dc}}/4$	0	$-i_{\mathrm{gx}}$
$V_2$	0	0	1	0	−1	$-V_{\mathrm{dc}}/4$	$i_{\mathrm{gx}}$	$i_{\mathrm{gx}}$
$V_3$	0	0	1	1	0	0	$i_{\mathrm{gx}}$	0
$V_4$	1	1	0	0	0	0	$i_{\mathrm{gx}}$	0
$V_5$	1	1	0	1	1	$V_{\mathrm{dc}}/4$	$i_{\mathrm{gx}}$	$-i_{\mathrm{gx}}$
$V_6$	1	1	1	0	1	$V_{\mathrm{dc}}/4$	0	$i_{\mathrm{gx}}$
$V_7$	1	1	1	1	2	$V_{\mathrm{dc}}/2$	0	0

The dynamic model of the grid-connected 5L-ANPC inverters is simplified under the assumption of symmetrical three-phase grid voltage and constant DC-bus voltage.

The inverter’s output phase voltage concerning neutral-point $u_{\mathrm{xo}}$ is described as ¹¹ :

$$u_{xo}=L_x\frac{V_{dc}}{4},$$

(1)

where $V_{\mathrm{dc}}$ and $L_x$ represent the DC-bus voltage and the level of the inverter’s output.

The voltage equations that depict the dynamic behavior of each phase are stated as follows^11,21:

$$\begin{array}{c}\multicolumn{1}{c}{u_{\mathrm{ao}}=u_{\mathrm{ga}}+R_f{i}_{\mathrm{ga}}+L_f\frac{d{i}_{\mathrm{ga}}}{\mathrm{dt}}+u_{\mathrm{no}},}\\ \multicolumn{1}{c}{u_{\mathrm{bo}}=u_{\mathrm{gb}}+R_f{i}_{\mathrm{gb}}+L_f\frac{d{i}_{\mathrm{gb}}}{\mathrm{dt}}+u_{\mathrm{no}},}\\ \multicolumn{1}{c}{u_{\mathrm{co}}=u_{\mathrm{gc}}+R_f{i}_{\mathrm{gc}}+L_f\frac{d{i}_{\mathrm{gc}}}{\mathrm{dt}}+u_{\mathrm{no}},}\end{array}$$

(2)

where the filter resistance and inductance are indicated by $R_f$ and $L_f$ , respectively. $u_{\mathrm{gx}}$ , $i_{\mathrm{gx}}$ , $u_{\mathrm{xo}}$ represent the grid voltage, grid current, and inverter phase voltage with $x\in \{a,b,c\}$ . $u_{\mathrm{no}}$ denotes the common-mode voltage.

Supposing the output three-phase voltage is symmetrical, the reduced dynamic model of the inverter-connected grid can be derived as^21,25:

$$\mathbf{u}={\mathbf{u}}_{\mathbf{g}}+R_f{\mathbf{i}}_{\mathbf{g}}+L_f\frac{d{\mathbf{i}}_{\mathbf{g}}}{\mathrm{dt}},$$

(3)

where $\mathbf{u}$ , ${\mathbf{u}}_{\mathbf{g}}$ , and ${\mathbf{i}}_{\mathbf{g}}$ represent the vectors of the inverter voltage, grid voltage, and current, respectively.

Referring to (3), the continuous-time presentation of the current can be rewritten as a stationary frame:

$$\begin{array}{c}\multicolumn{1}{c}{\frac{d{i}_{g\alpha }}{\mathrm{dt}}=\frac{1}{L_f}(u_{\alpha }-u_{g\alpha })-\frac{R_f}{L_f}{i}_{g\alpha },}\\ \multicolumn{1}{c}{\frac{d{i}_{g\beta }}{\mathrm{dt}}=\frac{1}{L_f}(u_{\beta }-u_{g\beta })-\frac{R_f}{L_f}{i}_{g\beta },}\end{array}$$

(4)

where $u_{\alpha }$ , $u_{\beta }$ , $u_{g\alpha }$ , $u_{g\beta }$ , $i_{g\alpha }$ , $i_{g\beta }$ symbolize the vector of inverter voltage, grid voltage and current in the $\alpha \beta$ reference system that are calculated by employing the Clarke transformation:

$$\begin{array}{c}\left[\begin{array}{c}{u}_{\alpha }\hfill \\ \multicolumn{1}{c}{u_{\beta }}\end{array}\right]=\left[\begin{array}{c}T\hfill \end{array}\right]\left[\begin{array}{ccc}{u}_{\mathrm{ao}}\hfill & u_{\mathrm{bo}}\hfill & u_{\mathrm{co}}\hfill \end{array}\right],\hfill \\ \left[\begin{array}{c}{u}_{g\alpha }\hfill \\ \multicolumn{1}{c}{u_{g\beta }}\end{array}\right]=\left[\begin{array}{c}T\hfill \end{array}\right]\left[\begin{array}{ccc}{u}_{\mathrm{ga}}\hfill & u_{\mathrm{gb}}\hfill & u_{\mathrm{gc}}\hfill \end{array}\right],\hfill \\ \left[\begin{array}{c}{i}_{g\alpha }\hfill \\ \multicolumn{1}{c}{i_{g\beta }}\end{array}\right]=\left[\begin{array}{c}T\hfill \end{array}\right]\left[\begin{array}{ccc}{i}_{\mathrm{ga}}\hfill & i_{\mathrm{gb}}\hfill & i_{\mathrm{gc}}\hfill \end{array}\right],\hfill \\ \left[\begin{array}{c}T\hfill \end{array}\right]=\frac{2}{3}\left[\begin{array}{ccc}1\hfill & -1/2\hfill & -1/2\hfill \\ \multicolumn{1}{c}{0}& \sqrt{3}/2\hfill & -\sqrt{3}/2\hfill \end{array}\right].\hfill \end{array}$$

(5)

With the assumption of constant DC-bus voltage, the mathematical model of the capacitor voltage is expressed as ¹³ :

$$\begin{array}{c}{i}_{c1}=C_{\mathrm{dc}}\frac{d{u}_{c1}}{\mathrm{dt}}=i_{c2}+i_{\mathrm{NP}},\hfill \\ i_{c2}=C_{\mathrm{dc}}\frac{d{u}_{c2}}{\mathrm{dt}}=C_{\mathrm{dc}}\frac{d(V_{\mathrm{dc}}-u_{c1})}{\mathrm{dt}}=-i_{c1},\hfill \end{array}$$

(6)

where $i_{\mathrm{NP}}$ is the sum of the three-phase neutral point current, which is determined by the inverter’s switching status and grid current as follows^13,23:

$$i_{\mathrm{NP}}=\sum _{x=a,b,c}{i}_{\mathrm{NPx}}=\sum _{x=a,b,c}|S_{x2}-S_{x3}|i_{\mathrm{gx}}.$$

(7)

The behavior of voltage oscillation in a flying capacitor can be expressed as:

$$\frac{u_{\mathrm{fx}}}{\mathrm{dt}}=\frac{1}{C_{\mathrm{fc}}}{i}_{\mathrm{fx}},$$

(8)

where $C_{\mathrm{fc}}$ is the flying capacitor. $i_{\mathrm{fx}}$ signifies the current through the flying capacitor. It is established based on the inverter’s switching status and the grid current, as follows^13,23:

$$i_{\mathrm{fx}}=(S_{x3}-S_{x4})i_{\mathrm{gx}}.$$

(9)

Employing forward-Euler discretization method to the dynamic model of a system described in (4), (6), (7), and (8), the discrete-time presentation is given by^12,13:

$$\begin{array}{c}{i}_{g\alpha }(k+1)=i_{g\alpha }\left(k\right)(1-\frac{T_s{R}_f}{L_f})+\frac{T_s}{L_f}(u_{\alpha }\left(k\right)-u_{g\alpha }\left(k\right)),\hfill \\ i_{g\beta }(k+1)=i_{g\beta }\left(k\right)(1-\frac{T_s{R}_f}{L_f})+\frac{T_s}{L_f}(u_{\beta }\left(k\right)-u_{g\beta }\left(k\right)),\hfill \\ u_o(k+1)=u_o\left(k\right)+\frac{T_s}{C_{\mathrm{dc}}}\sum _{x=a,b,c}|S_{x2}\left(k\right)-S_{x3}\left(k\right)|i_{\mathrm{gx}}\left(k\right),\hfill \\ u_{\mathrm{fa}}(k+1)=u_{\mathrm{fa}}\left(k\right)+\frac{T_s}{C_{\mathrm{fc}}}(S_{a3}\left(k\right)-S_{a4}\left(k\right))i_{\mathrm{ga}},\hfill \\ u_{\mathrm{fb}}(k+1)=u_{\mathrm{fb}}\left(k\right)+\frac{T_s}{C_{\mathrm{fc}}}(S_{b3}\left(k\right)-S_{b4}\left(k\right))i_{\mathrm{gb}},\hfill \\ u_{\mathrm{fc}}(k+1)=u_{\mathrm{fc}}\left(k\right)+\frac{T_s}{C_{\mathrm{fc}}}(S_{c3}\left(k\right)-S_{c4}\left(k\right))i_{\mathrm{gc}},\hfill \end{array}$$

(10)

where $T_s$ is sampling time of the controller. $u_o\left(k\right)$ is the neutral-point voltage of DC-bus: $u_o\left(k\right)=u_{c1}\left(k\right)-u_{c2}\left(k\right)$ .

The active and reactive power can be determined the components of the grid voltage and current ²⁴ :

$$\begin{array}{c}{P}_g=\frac{3}{2}(u_{g\alpha }{i}_{g\alpha }+u_{g\beta }{i}_{g\beta }),\hfill \\ Q_g=\frac{3}{2}(u_{g\beta }{i}_{g\alpha }-u_{g\alpha }{i}_{g\beta }).\hfill \end{array}$$

(11)

Direct power control with simplified self-balancing of the flying capacitor voltage approach based on the FCS-MPC scheme

The main goals of the control strategy are:

• Monitor and regulate the desired levels of active and reactive power in the grid.

• Keep equilibrium of the DC-bus capacitor voltage.

• Balance the voltage of the FC.

To accomplish these aims, the traditional FCS-MPC utilizes an appropriate cost function, given by^12,13:

$$\begin{array}{c}\multicolumn{1}{c}{J\left(S_k\right)={(P_g^{*}(k+1)-P_g(k+1))}^2}\\ +{(Q_g^{*}(k+1)-Q_g(k+1))}^2\hfill \\ +{\lambda }_{\mathrm{fc}}\sum _{x=a,b,c}{(v_{\mathrm{fx}}^{*}(k+1)-v_{\mathrm{fx}}(k+1))}^2\hfill \\ +{\lambda }_{\mathrm{dc}}{(u_o^{*}(k+1)-u_o(k+1))}^2,\hfill \end{array}$$

(12)

where $P_g^{*}(k+1)$ and $Q_g^{*}(k+1)$ represent the grid active and reactive powers needed at instant $k+1$ , respectively, while $P_g(k+1)$ and $Q_g(k+1)$ indicate their corresponding predicted values. $v_{\mathrm{fx}}^{*}(k+1)$ implies the desired voltage of the flying capacitor, which is fixed at $V_{\mathrm{dc}}/4$ . The neutral-point voltage reference of the DC-link, known as $u_o^{*}(k+1)$ , is defined as zero. The coefficient factors ${\lambda }_{\mathrm{fc}}$ and ${\lambda }_{\mathrm{dc}}$ are utilized to accomplish satisfactory performance in balancing FC and neutral-point voltages.

The expected future grid power transfer values are derived using the Lagrange extrapolation method ¹² :

$$\begin{array}{c}{P}_g^{*}(k+1)=3P_g^{*}\left(k\right)-3P_g^{*}(k-1)+P_g^{*}(k-2),\hfill \\ Q_g^{*}(k+1)=3Q_g^{*}\left(k\right)-3Q_g^{*}(k-1)+Q_g^{*}(k-2).\hfill \end{array}$$

(13)

The control switching inputs refer to the different combinations of operational statuses, which consist of three subsets: $S_a$ , $S_b$ , and $S_c$ . Every phase is constructed using the switching states arranged in the $[S_{x1},S_{x1}\prime ,S_{x2},S_{x2}\prime ,S_{x3},S_{x3}\prime ,S_{x4},S_{x4}\prime ]$ format, where the switch states are depicted as binary variables. The control state, as shown in Table 1, is likewise constrained to a limited group $\mathbb{S}=\{1,...,512\}$ , providing a range of possibilities for the best control switching gates. The switches of the inverter are implemented by finding the optimal solution:

$$S_{\mathrm{opt}}=\underset{S_k\in \mathbb{S}}{\mathrm{argmin}}J\left(S_k\right)$$

(14)

Table 1 shows that the voltages of FC are significantly influenced by two redundant combinations of switches ( $V_1$ , $V_2$ ) and ( $V_5$ , $V_6$ ). When the pathways of current flow overlap, the switching conditions $V_1$ and $V_2$ produce contrasting impacts on FC, just as the switching conditions $V_5$ and $V_6$ do. In these duplicate states, the polarity of the FC current undergoes alterations. The flying capacitor current varies in intensity, either increasing or decreasing based on the selected state. As a result, when the output phase voltage assumes either levels $V_{\mathrm{dc}}/4$ or $-V_{\mathrm{dc}}/4$ , the process of choosing switching conditions becomes straightforward. In this case, the voltage balancing of the FC is guaranteed by identifying the orientation of the grid current $i_{\mathrm{gx}}$ and the FC voltage $u_{\mathrm{fx}}$ . If the FC voltage is greater than $V_{\mathrm{dc}}/4$ in output level ( $L_x$ ) −1, the switching vector will be chosen with a positive value of $i_{\mathrm{gx}}$ , while the switching vector $V_2$ will be chosen with a negative value of $i_{\mathrm{gx}}$ . Meanwhile, the switching status $V_2$ will be applied when $i_{\mathrm{xg}}\ge 0$ , while the opposite occurs for the switching status $V_1$ . Similarly, if the output level is 1 and the grid current is positive, the switching vector $V_5$ will be adopted as long as the FC voltage $u_{\mathrm{fx}}$ is greater than $V_{\mathrm{dc}}/4$ . Otherwise, the alternate switching state $V_6$ will be preferred. The switching vectors $V_0$ and $V_7$ do not affect the FC voltages, as the grid current does not pass through the FC. The FC voltages remain unaffected when the vectors $V_3$ and $V_4$ are selected, but it does have the same effect on the voltages of the DC-link capacitor. Table 2 provides an overview of balancing FC voltages by employing the suitable switching vector under different operational conditions.

Table 2.

Facilitated logic condition for determining the proper switching vector of balancing FC voltage.

Output level	FC voltage	Grid current	Suitable switching vector
−1	$u_{\mathrm{fx}}\ge V_{\mathrm{dc}}/4$	$i_{\mathrm{gx}}\ge 0$	$V_1$
		$i_{\mathrm{gx}}<0$	$V_2$
	$u_{\mathrm{fx}}<V_{\mathrm{dc}}/4$	$i_{\mathrm{gx}}\ge 0$	$V_2$
		$i_{\mathrm{gx}}<0$	$V_1$
1	$u_{\mathrm{fx}}\ge V_{\mathrm{dc}}/4$	$i_{\mathrm{gx}}\ge 0$	$V_5$
		$i_{\mathrm{gx}}<0$	$V_6$
	$u_{\mathrm{fx}}<V_{\mathrm{dc}}/4$	$i_{\mathrm{gx}}\ge 0$	$V_6$
		$i_{\mathrm{gx}}<0$	$V_5$

If we disregard the resistance of the filter, equation (4) can be rephrased in the $\alpha \beta$ stationary frame as:

$$\begin{array}{c}\multicolumn{1}{c}{\left[\begin{array}{c}{i}_{g\alpha }(k+1)\hfill \\ \multicolumn{1}{c}{i_{g\beta }(k+1)}\end{array}\right]=\left[\begin{array}{c}{i}_{g\alpha }\left(k\right)\hfill \\ \multicolumn{1}{c}{i_{g\beta }\left(k\right)}\end{array}\right]-\frac{T_s}{L_f}(\left[\begin{array}{c}{u}_{\alpha }\left(k\right)\hfill \\ \multicolumn{1}{c}{u_{\beta }\left(k\right)}\end{array}\right]-\left[\begin{array}{c}{u}_{g\alpha }\left(k\right)\hfill \\ \multicolumn{1}{c}{u_{g\beta }\left(k\right)}\end{array}\right])}\end{array}$$

(15)

Assuming that the grid voltage remains steady because of a brief sampling term $T_s$ , the variation of grid power over one sampling period is derived by (11):

$$\begin{array}{c}\multicolumn{1}{c}{\left[\begin{array}{c}{P}_g(k+1)\hfill \\ \multicolumn{1}{c}{Q_g(k+1)}\end{array}\right]=\frac{3T_s}{2}\left[\begin{array}{cc}{u}_{g\alpha }\left(k\right)\hfill & u_{g\beta }\left(k\right)\hfill \\ \multicolumn{1}{c}{u_{g\beta }\left(k\right)}& -u_{g\alpha }\left(k\right)\hfill \end{array}\right]\left[\begin{array}{c}{i}_{g\alpha }(k+1)\hfill \\ \multicolumn{1}{c}{i_{g\beta }(k+1)}\end{array}\right]}\\ -\frac{3T_s}{2}\left[\begin{array}{cc}{u}_{g\alpha }\left(k\right)\hfill & u_{g\beta }\left(k\right)\hfill \\ \multicolumn{1}{c}{u_{g\beta }\left(k\right)}& -u_{g\alpha }\left(k\right)\hfill \end{array}\right]\left[\begin{array}{c}{i}_{g\alpha }\left(k\right)\hfill \\ \multicolumn{1}{c}{i_{g\beta }\left(k\right)}\end{array}\right]\hfill \\ +\left[\begin{array}{c}{P}_g\left(k\right)\hfill \\ \multicolumn{1}{c}{Q_g\left(k\right)}\end{array}\right]\hfill \end{array}$$

(16)

The purpose of our approach is to follow the reference value of grid power. Therefore, it can be inferred:

$$P_g(k+1)=P_g^{*}(k+1),Q_g(k+1)=Q_g^{*}(k+1).$$

(17)

The desired inverter voltage is obtained by substituting (15) and (17) into (16):

$$\begin{array}{c}\multicolumn{1}{c}{\left[\begin{array}{c}{u}_{\alpha }^{*}\left(k\right)\hfill \\ \multicolumn{1}{c}{u_{\beta }^{*}\left(k\right)}\end{array}\right]=\frac{3L_f}{2T_s{\widehat{U}}_g}\left[\begin{array}{cc}{P}_g^{*}(k+1)\hfill & Q_g^{*}(k+1)\hfill \\ \multicolumn{1}{c}{-Q_g^{*}(k+1)}& P_g^{*}(k+1)\hfill \end{array}\right]\left[\begin{array}{c}{u}_{g\alpha }\left(k\right)\hfill \\ \multicolumn{1}{c}{u_{g\beta }\left(k\right)}\end{array}\right]}\\ -\frac{3L_f}{2T_s{\widehat{U}}_g}\left[\begin{array}{cc}{P}_g\left(k\right)\hfill & Q_g\left(k\right)\hfill \\ \multicolumn{1}{c}{-Q_g\left(k\right)}& P_g\left(k\right)\hfill \end{array}\right]\left[\begin{array}{c}{u}_{g\alpha }\left(k\right)\hfill \\ \multicolumn{1}{c}{u_{g\beta }\left(k\right)}\end{array}\right]+\left[\begin{array}{c}{u}_{g\alpha }\left(k\right)\hfill \\ \multicolumn{1}{c}{u_{g\beta }\left(k\right)}\end{array}\right],\hfill \end{array}$$

(18)

where ${\widehat{U}}_g$ is the square of the voltage amplitude for the grid that is given by ${\widehat{U}}_g=u_{g\alpha }^2+u_{g\beta }^2$ .

The typical FCS-MPC method utilizes 512 potential control inputs from the 5L-ANPC inverters to optimize the control objective and achieve the best combination sequence of the switches Consequently, this approach results in a significant computational workload, necessitating either a robust processor or an extended sampling time. Unfortunately, longer sampling times can negatively impact the performance of the control system. Various approaches have been suggested to alleviate the computational load associated with multilevel inverters. ²¹ suggested the level jump limitation technique of inverter voltage to minimize the number of switching states, leading to a decrease in computation time. However, the control performance deteriorates due to eliminating several switching states. In addition, the choice of numerous weighting elements is the drawback of this technique. ²⁴ enhanced a control technique by integrating sector distribution into the FCS-MPC for four-level nested NPC inverters. Nevertheless, it is still a bit extensive because of the varying influence of the duplicative switching vector on the equilibrium of FC voltages. This leads to the unfeasibility of executing the algorithm with a short sampling interval. To solve the problems above, our research paper introduces a proposed method that not only effectively tackles the heavy computational burden but also ensures the FC voltage self-balancing without the need for a weighting factor. The control approach comprises a three-phase strategy. During the initial phase, the needed inverter voltage’s sector position is determined by utilizing predictive power and its reference in conjunction with grid voltage. In this case, we can select the inverter voltage vector from sector I to VI. For example, there are 35 feasible inverter voltage vectors of sector I as indicated by Table 3. However, the 5L-ANPC inverter has 150 possible switching states due to the different impact of the FC voltage and neutral-point voltage. Moreover, two redundant vectors, $V_3$ and $V_4$ , have the same impact on the equilibrium of the neutral-point voltage, as mentioned in Table 1. For this reason, only one of them will be taken into account for the optimization loop. For additional clarification, consider the voltage vector 10-1 of sector I. There are eight potential switching states, as each phase comprises two switching combinations. The suggested approach specifically employs one of these feasible switching states, namely 110100110001. It means that we determine the switching vectors $V_5$ for output level 1, $V_1$ for output level −1, and $V_3$ for output level 0, respectively. This selection is crucial for the optimization loop to proceed effectively. In the second stage, the computational burden is reduced by optimizing the cost function through an iteration loop of 35 viable voltages to achieve the most satisfactory inverter voltage vector. For a more comprehensive understanding, Table 3 outlines the specific details of how the feasible switching signals of sector I are chosen and utilized within the context of the optimization problem. This detailed breakdown allows for a thorough examination of the decision-making process involved in determining the optimal inverter voltage for the given voltage vector. The feasible switching states of the proposed algorithm for evaluating the objective function are greatly decreased from 512 to 35 in contrast to the standard FCS-MPC. ¹³ The adjusted objective function is denoted by:

$$\begin{array}{l}g\left(u_k\right)={\left(P_g^{\ast }\left(k+1\right)-P_g\left(k+1\right)\right)}^2\\ +{\left(Q_g^{\ast }\left(k+1\right)-Q_g\left(k+1\right)\right)}^2+{\lambda }_{dc}{u}_o{\left(k+1\right)}^2\end{array}$$

(19)

Table 3.

Possible switching signal applicable to sector I.

Voltage vector	Possible switching signal
$u$	$S=\left[S_{a1}{S}_{a2}{S}_{a3}{S}_{a4}{S}_{b1}{S}_{b2}{S}_{b3}{S}_{b4}{S}_{c1}{S}_{c2}{S}_{c3}{S}_{c4}\right]$
-2-2-2	000000000000
-1-1-1	000100010001/000100010010/000100100001/000100100010
	001000010001/001000010010/001000100001/001000100010
000	00100110011/001100111100/001111000011/001111001100
	110000110011/11000011100/110011000011/110011001100
111	11011011101/110111011110/110111101101/110111101110
	111011011101/111011011110/111011101101/111011101110
222	111111111111
-1-2-2	000100000000/001000000000
0-1-1	001100010001/001100010010/00110010001/001100100010
	110000010001/11000001010/110000100001/110000100010
100	110100110011/110100111100/110111000011/110111001100
	111000110011/111000111100/111011000011/111011001100
211	111111011101/111111011110/111111101101/111111101110
-1-1-2	000100010000/000100100000/001000010000/001000100000
00-1	001100110001/001100110010/001111000001/001111000010
	110000110001/110000110010/110011000001/110011000010
110	110111010011/110111011100/110111100011/110111101100
	111011010011/111011011100/111011100011/111011101100
221	111111111101/111111111110
0-2-2	001100000000/110000000000
1-1-1	110100010001/110100010010/110100100001/110100100010
	111000010001/111000010010/111000100001/111000100010
200	111100110011/111100111100/111111 00011/111111001100
0-1-2	001100010000/001100100000/110000010000/110000100000
10-1	110100110001/110100110010/110111000001/110111000010
	111000110001/111000110010/111011000001/111011000010
210	111111010011/111111011100/111111100011/111111101100
00-2	001100110000/001111000000/110000110000/110011000000
11-1	110111010001/110111010010/110111100001/110111100010
	111011010001/111011010010/111011100001/111011100010
220	111111110011/111111111100
1-2-2	110100000000/111000000000
2-1-1	111100010001/111100010010/111100100001/111100100010
1-1-2	110100010000/110100100000/111000010000/111000100000
20-1	111100110001/111100110010/111111000001/111111000010
10-2	110100110000/110111000000/111000110000/111011000000
21-1	111111010001/111111010010/111111100001/111111100010
11-2	110111010000/110111100000/111011010000/111011100000
22-1	111111110001/111111110010
2-2-2	111100000000
2-1-2	111100010000/111100100000
20-2	111100110000/111111000000
21-2	111111010000/111111100000
22-2	111111110000

In the final stage, the optimal switching state of the inverter is realized by combining the most suitable inverter voltage from the optimization loop and the proposed FC voltage balancing. If the best inverter voltage belongs to the voltage level $V_1$ or $V_5$ , the best switching status is performed by utilizing a simple logic condition, as outlined in Table 2. For instance, the inverter voltage that is considered appropriate based on the iteration loop is 1-1-2. The best suitable switching state of phase A is $V_5$ (1101) or $V_6$ (1110) depending on the logic condition of Table 2. Similarly, we get the best switching state of phase B is $V_1$ (0001) or $V_2$ (0010). The offered strategy introduces the most suitable sequence of switches that aligns with the best inverter voltage vector. There is no requirement for predictions concerning FC voltages. The cost function evaluations of the proposed method are only conducted for the 35 vectors under consideration. In contrast, the traditional FCS-MPC ¹³ necessitates 512 current predictions, 512 FC voltage predictions, 512 neutral-point voltage predictions, and 512 cost function assessments per sampling period. Compared to the alternative method, ²⁵ the viable switching states for the resolution of the cost function are decreased by 72% from 125 to 35. Furthermore, three control goals are accomplished using a single weighting coefficient of neutral point voltage, simplifying control complexity by eradicating the challenging task of blending multiple weighting coefficients. The new approach offers a creative solution to simplify computational tasks and achieve self-balancing FC voltage. Our method also helps to validate FCS-MPC with a lower DSP, which can lead to a reduction in system cost. Figure 3 exhibits the control algorithm for the proposed strategy with three principal steps:

• Step 1: Determine the required inverter voltage $u_{\alpha }^{*}\left(k\right),u_{\beta }^{*}\left(k\right)$ using (18); select sector location.

• Step 2: Evaluate the cost function $g\left(u_k\right)$ based on (19) to achieve the best inverter voltage among the feasible values of the selected sector.

• Step 3: FC capacitor voltage balancing by employing the condition of Table 2.

Figure 3.

The diagram illustrating implemented proposed method.

Simulation and processor-in-loop results

The suggested control strategy’s effectiveness is confirmed in Matlab, whereas the 5L-ANPC inverters are built using Simpowersystem. The parameters associated with the studied approach are detailed in Table 4. The control objectives include tracking the desired grid powers and ensuring the balancing voltage of the DC-bus and FC through dynamic and steady-state conditions.

Table 4.

Parameters for the analyzed system.

Parameters	Value
DC-bus input	1500 V
Grid voltage	380 V
Grid frequency	50 Hz
Filter resistance	10 m $\mathrm{\Omega }$
Filter inductance	10 mH
Flying capacitor	1000  $\mu$ F
DC-link capacitor	4700  $\mu$ F
Sampling time	50  $\mu$ s

Steady-state analysis

The assessment of stable deviation is conducted using the mean absolute percentage error (MAPE), formulated as ¹² :

$$\mathrm{MAPE}=\frac{1}{n}\sum _{k=1}^n\left|\frac{y_k^{*}-y_k}{y_k^{*}}\right|,$$

(20)

where $y_k^{*}$ and $y_k$ represent the required value and its corresponding measurement, respectively.

The suggested formulation in Rodriguez and Cortes ¹² allows for an estimation of the mean frequency of the power switches for the 5L-ANPC inverters as:

$$\begin{array}{c}\multicolumn{1}{c}{f_{\mathrm{sw}}=\frac{f_{\mathrm{sw}-a}+f_{\mathrm{sw}-b}+f_{\mathrm{sw}-c}}{3}}\\ =\sum _{x=a,b,c}\frac{n_{s{w}_{x1}}+n_{s{w}_{x2}}+n_{s{w}_{x3}}+n_{s{w}_{x4}}}{12T_{\mathrm{sim}}},\hfill \end{array}$$

(21)

where $T_{\mathrm{sim}}$ defines a analyzed time. $f_{\mathrm{sw}-a}$ , $f_{\mathrm{sw}-b}$ , and $f_{\mathrm{sw}-c}$ denote the frequencies of switches in phases $a$ , $b$ , and $c$ , respectively. $n_{s{w}_{x1}}$ , $n_{s{w}_{x2}}$ , $n_{s{w}_{x3}}$ , and $n_{s{w}_{x4}}$ denote the count of state changes in the switches of individual branches. The observed mean switching frequency for the simulated system is approximately 5 kHz.

Figure 4 displays the consistent achievement of the proposed method at a constant reactive power of 15 kW with operation at a power factor of one. The data presented in Figure 4(a) indicates that the outcome powers can closely track their target with minimal power fluctuations. The MAPE for active power is calculated to be 1.98%, while for reactive power, it is 2.36%. Additionally, the inverter output phase voltage, represented in Figure 4(b), exhibits a step-square waveform. The presented technique effectively generates a high-quality sinusoidal waveform for the grid current, as illustrated in Figure 4(c). The Simulink Fast Fourier Transform (FFT) toolbox is utilized to examine the grid spread and its harmonic spectra under stable conditions. Figure 4(d) demonstrates that the total harmonic distortion of the grid current is 1.15%, meeting the standards specified in the IEEE 519-2014 standard.

Figure 4.

Stable state achievement of the suggested method with $P_g=15$  kW and $Q_g=0$  Var: (a) grid active and reactive powers, (b) inverter output phase voltage, (c) three-phase grid current, and (d) harmonic spread of grid current.

Dynamic analysis

In order to validate that the suggested strategy is both effective and feasible, a comparison is made between it and the standard FCS-MPC, ¹³ a previous MPC method, ²⁵ and a prior approach ²⁴ under identical operational conditions. The analysis involved switching the active power from 5 to 15 kW at time $t=0.1$  s, while keeping the power factor at one, as shown in Figure 5(a). The method that was suggested showed excellent tracking ability, with a quick and smooth response without any overshooting, comparable to the three controllers outlined in Figure 5(b). All three control techniques achieved a stable active power condition in less than 0.4 ms. Figures 5(c) to (f) show the three-phase current responses of the other techniques, the proposed method, and the standard FCS-MPC. It is worth mentioning that the grid current of the proposed technique showed balanced and consistent behavior even during temporary conditions. Furthermore, the proposed approach yielded a THD of 1.15% in the grid current, contrasting with 1.28% in the mentioned technique, ²⁵ 1.43% in the other technique, ²⁴ and 1.14% in the traditional FCS-MPC. Even though the absence of a weighting element resulted in a non-optimal THD, it is believed that the effectiveness of the suggested strategy adheres to the criteria set by the IEEE 519 guideline, with only a minor THD increment compared to the traditional FCS-MPC. The reduction in the MAPE of power ripples is quantified at 3.41% and 14.66% when evaluated against the previous method ²⁵ and the earlier technique, ²⁴ respectively. Moreover, Figure 5(g) depicts the voltages of DC-bus for 5L-ANPC inverters employing the suggested technique. From this figure, we can note that the voltages of the DC-bus maintain balance at $V_{\mathrm{dc}}/2$ when subjected to a sudden change in active power. Figure 5(i) displays the dynamic behavior of three FC voltages. It’s noteworthy that the equilibrium of FC voltages remains at $V_{\mathrm{dc}}/4$ (375 V), even in the presence of active power fluctuations. Notably, the equilibrium of FC voltages and DC-link capacitor voltages closely resembles that of the traditional FCS-MPC and other techniques presented earlier, as illustrated in Figure 5(h) and (j).

Figure 5.

The dynamic reaction to a sudden change in active power: (a) grid power response of four methods, (b) close-up of the active power during the sudden change, (c) grid current of the prior approach, ²⁴ (d) grid current of the previous method, ²⁵ (e) grid current of the suggested approach, (f) grid current of the traditional FCS-MPC, (g) DC-link capacitor voltages of the proposed method, (h) upper capacitor voltages of the DC-bus for four methods, (i) flying capacitor voltages of the proposed method, (j) flying capacitor voltages of phase a for four methods.

In order to further confirm the viability of the presented method, a second study was conducted to examine the impact of varying the power factor. In this investigation, the active power remained constant at 15 kW, while the associated reactive value was adjusted from 0 to 7265 Var at time 0.1 s. The results, depicted in Figure 6(a), clearly demonstrate the effectiveness of the extended approach in accurately tracking such unexpected changes in the power factor. Additionally, it is worth noting that the grid currents, as illustrated in Figure 6(b), maintained their sinusoidal waveform despite the variations, further highlighting the robustness of the proposed approach.

Figure 6.

The dynamic behavior of the offered algorithm under different power factor conditions: (a) grid active and reactive powers and (b) three-phase grid current.

Comparison of computation times

In an attempt to confirm the benefits of the suggested approach in reducing computational burden, the tic-toc toolbox in Matlab is utilized to quantify the processing time for three methods. Specifically, employing a 1.6 GHz core i5 8250, the lowest, mean, and highest computation times for the suggested technique are recorded as 4, 17, and 30  $\mu$ s, respectively. In comparison, the previous FCS-MPC ²⁵ necessitates 10, 39 and 58  $\mu$ s, while the standard FCS-MPC takes 25, 48, and 71  $\mu$ s. The mean calculation time of the offered algorithm is notably reduced by 64.58% compared to the traditional method. Relative to the previous methodology, ²⁵ the corresponding value has been decreased by 56.4%, from 39 to 17  $\mu$ s, and it has also shown a reduction of 61.36% when evaluated against the alternative technique. ²⁴ Figure 7 illustrates the notable reduction in computation time achieved by the suggested technique in comparison to the traditional FCS-MPC and the others approaches. Furthermore, it is noteworthy that the maximum computation time of the conventional and forenamed methods exceeds the sampling duration (50  $\mu$ s), indicating a restriction of these approaches. In contrast, the suggested strategy offers further support for implementing FCS-MPC in multilevel inverters using a cost-effective processor and a shorter sampling period, thereby potentially enhancing control performance through reduced sampling intervals. Additionally, the proposed method circumvents the complexity associated with cumbersome procedures in the tuning process of multiple weighting factors. Table 5 underscores the precise power-tracking ability of the suggested approach in both stable and dynamic operations while decreasing the computational burden.

Figure 7.

Evaluation of the time taken for computation using four different control methods.

Table 5.

Comparison of the effectiveness of four controllers.

Grid active power	$P_g^{*}$  = 5 → 15 (kW)
	Proposed method	Previous method 25	Traditional method	Prior method 24
MAPE of $P_g$ (%)	1.98	2.05	1.96	2.32
MAPE of $Q_g$ (%)	2.36	2.4	2.33	2.65
Settling time (ms)	0.4	0.4	0.4	0.4
THD of current (%)	1.15	1.21	1.14	1.43
Minimum computation time ( $\mu$ s)	4	10	25	23
Mean computation time ( $\mu$ s)	17	39	48	44
Maximum computation time ( $\mu$ s)	30	58	71	65
Multiple weighting factor selection	Not required	Not required	Required	Required

Processor-in-loop verification

This section elaborates on using Processor-in-loop (PIL) verification to determine the practicality of the proposed control approach that incorporates a digital signal processor (DSP) controller. The TMS320F28379D microcontroller from the C2000 series was specifically designed to serve as an PIL emulator, enabling the testing of the proposed system and facilitating a detailed scrutiny of the simulation results.^7,32 In this scenario, the PIL emulator operates in a simulated setting, effectively replicating and controlling the configuration components, particularly focusing on the power circuit, which integrates the grid and the 5L-ANPC inverter, facilitated by the Simpower system toolbox. The algorithm awaiting validation is installed within the DSP. Virtual serial transmission ports provide a more streamlined connection between the host system and the real controller. The 5L-ANPC inverters, which are connected to the grid, send their measured signals to the microcontroller board. The controller evaluates these signals to compute the optimal switching status, which is relayed back to the system. Figure 8 presents the fundamental components and signal trajectories pertinent to the PIL simulation of the proposed strategy.

Figure 8.

Framework of a PIL testing configuration for a 5L-ANPC inverter integrated with a grid.

Figure 9 presents the findings from the PIL verification of the offered technique. This figure corresponds to a scenario in which the preferred active power of the grid changes from 5 to 15 kW, with a unity power factor at $t=0.1$  s. As a result, the peak output grid current rises from 11 to 32.5 A. Figure 9(b) and (f) illustrate the grid current along with its harmonic components. The analysis shows that the THD of the grid current is maintained below 5%, supporting the simulation results. Furthermore, the stability of the FC voltages and DC-bus capacitor voltages is confirmed, as represented in Figure 9(c) and (d). Acknowledging that the signals generated in the PIL setup exhibit elevated noise and spikes compared to the more advanced simulation results is critical. These distinctions can be traced back to the real-world elements and restrictions that the PIL framework entails, which may cause slight variations between the outcomes of PIL validation and those derived from simulation. The consistent correlation between PIL and simulation results validates the practical significance of the proposed strategy.

Figure 9.

The examination of the recommended technique through the process of PIL verification: (a) grid active and reactive powers: (b) grid current, (c) FC voltages, (d) DC-bus capacitor voltages, (e) inverter output phase voltage, and (f) harmonic spread of grid current.

Conclusions

This paper introduces a scheme-driven FCS-MPC for regulating power transfer in grid-tie 5L-ANPC inverters. The significance of our research is attributed to the integration of the effective FCS-MPC method, aiming to alleviate computational burdens, avoid the challenge of determining multiple optimal weighting factors, and achieve self-balancing FC voltages. This process is carried out in three distinct stages. The first stage involves identifying the sector position of the required inverter voltage by employing predictive power in conjunction with its reference and the grid voltage. In the second stage, the computational complexity is mitigated by refining the cost function through an iterative loop of 35 potential voltages. The final stage results in determining the optimal switching state of the inverter, achieved by integrating the most appropriate inverter voltage from the optimization loop with the suggested FC voltage balancing. The proposed strategy demonstrates performance comparable to conventional FCS-MPC in both dynamic and steady-state conditions, effectively regulating power ripples and the THD of the grid current while achieving a substantial reduction in computational costs of 91%. An improvement in steady-state performance was observed with the proposed algorithm when compared to existing methods. The MAPE of power ripples was lowered by 3.41% and 14.66% when evaluated against the previous method ²⁵ and the earlier approach, ²⁴ respectively. The offered approach yielded a THD of 1.15% in the grid current in contrast to the 1.28% reported in the method from Wu and Wang ²⁵ and the 1.43% noted for an alternative technique. ²⁴ The corresponding decrease in computation time is 56.4% and 61.36%. Our work proposes a structure for deploying the FCS-MPC method on an affordable control platform with a limited sampling interval. These findings might aid in developing a feasible control methodology for MLIs with high-power applications. This approach does not take into account the conditions of the distorted grid. Future research will focus on conducting experiments under these circumstances.