Damage Metric-Based Mapping Approaches for Developing Accelerated Thermal Cycling Guidelines for Electronic Packages

Abstract

The accumulated equivalent inelastic strain per cycle and the maximum strain energy density over one cycle have been used as damage metrics to map the solder fatigue damage during Field-Cycling (FC) and Accelerated Thermal Cycling (ATC) simulations. The objective of this work is to develop accelerated thermal cycling guidelines for flip-chip on board and flip-chip chip-scale electronic packages used in, for example, automotive applications. The percentage contributions of plastic and creep strains to the total inelastic strain and contributions within the accelerated cycling are used as a basis for developing modified accelerated thermal cycles. Different temperature regimes are explored to match the contributions of plastic and creep strains to total inelastic strain during field-cycling and accelerated thermal cycling and to reduce the time required for accelerated thermal cycling. The process mechanics of component assembly, time-and temperature-dependent material behavior and critical geometric features of the assembly are taken into consideration while developing the comprehensive virtual accelerated thermal cycling methodology.