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1-5 of 5 results for VLIW

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Select article: Reducing code size in VLIW instruction scheduling

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Research article

First published 2005-8

Reducing code size in VLIW instruction scheduling

Steve Haga, Andrew Webber, Yi Zhang [...]

Journal of Embedded Computing

Select article: A customized and reconfigurable VLIW-based packet classifier on ρ -VEX

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Research article

First published 2016-6-2

A customized and reconfigurable VLIW-based packet classifier on ρ -VEX

Mahmood Ahmadi, Ehsan Zadkhosh

Journal of High Speed Networks

Select article: A Real-Time Scan Conversion Algorithm on Commercially Available Microprocessors 1

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Research article

First published 1996-10

A Real-Time Scan Conversion Algorithm on Commercially Available Microprocessors 1

Chris Basoglu, Yongmin Kim, Vikram Chalana

Ultrasonic Imaging

Select article: Simulation of digital scan conversion for ultrasound systems using a digital signal processor

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Research article

First published 2011-8

Simulation of digital scan conversion for ultrasound systems using a digital signal processor

Deep Bera, Leeladhar Agarwal, Swapna Banerjee

Ultrasound

Select article: Using Transport Triggered Architectures for Embedded Processor Design

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Research article

First published 1998-2

Using Transport Triggered Architectures for Embedded Processor Design

Henk Corporaal, Marnix Arnold

Integrated Computer-Aided Engineering

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